You send the requirements. The pipeline runs on our servers; you approve each checkpoint online and receive the release package. Nothing to install.
Open test run 10 in the viewer →Download its release · zip, 2.9 MB
Schematic, layout, scripts, release package and decision log belong to you once the board is paid for.
We sign your NDA before you send the requirements, or offer ours.
Each project lives in its own private repository. Nothing from one customer's board is shown to another.
Which data reaches the AI model provider, how long it is kept and which model runs your board are named in the contract.
No. The AI agents write and run build scripts; they do not edit the board by hand. Nine deterministic gates decide whether a board ships, and an engineer approves every stage.
Sets the inputs, approves the schematic, placement, routing and release, and decides every open point. The agents do the routine work between checkpoints.
KiCad 10, native project files. Altium imports KiCad projects; on request we check the import before release.
Yes. Rules, checks, templates and part preferences are plain files. Your standards and reference designs are added the same way.
You do, once it is paid: KiCad files, scripts, release package and decision log.
Not yet. Releases are verified by checks, models and simulation. The first boards are ordered through the pilots; photos and measurements will be published.
Order files come in KiCad and JLCPCB formats; Gerber, drill, BOM and placement work with any fab, European ones included. Every BOM line has the manufacturer part number; LCSC numbers today, Mouser, Digi-Key and Farnell next.
The design from agreed inputs to release, every gate and the full release package, with one round of changes per checkpoint. Fabrication and assembly are extra, at the fab's cost. Prices exclude VAT.
We deliver a verified documentation package, not a guarantee of function; you approve every checkpoint. If an error in our design is found, the corrected re-release is discounted.
As a revision: the change goes into the scripts, all gates run again, a new tagged release ships. 15 to 30 % of the tier price.
From 1–2 days for a simple board to 4–6 weeks for an SoC with DDR3. Fast-track starts within 24 hours. Times per tier →
A small embedded hardware team. ZeroErrata is in its pilot phase; company details come with the quote, and work is contracted and invoiced through a legal entity.
A fixed price and date within one working day.